Profile cover photo
Profile photo
eSilicon Corporation
14 followers -
Collaborate. Differentiate. Win.
Collaborate. Differentiate. Win.

14 followers
About
Posts

Post has attachment
Add a comment...

Post has attachment
Configurable, flexible silicon-proven IP platforms reduce risk. #SiliconProven IP is important, but it’s not enough. To significantly reduce risk, IP must be verified to work together: testability, metal stack, etc. http://bit.ly/2IDNuSA
Add a comment...

Post has attachment
Designing with #HighBandwidthMemory (#HBM2/2.5D) for #HPC + a sneak peek at #HBM2e with eSilicon’s Tim Horel. Tech Talk Video from SemiEngineering. #Hyperscale #DataCenter #CloudComputing #MachineLearning http://bit.ly/2NiI68i
Photo
Add a comment...

Post has attachment
IP Reality Check
The concept of IP that works well together and supports customization for target applications makes a lot of sense. Recently, eSilicon announced two such IP offerings for #HPC and #AIchips; eSilicon calls the concept an “IP platform.” http://bit.ly/2RmCVaJ
Add a comment...

Post has attachment
Configurable, flexible silicon-proven IP platforms reduce risk. #SiliconProven IP is important, but it’s not enough. To significantly reduce risk, IP must be verified to work together: testability, metal stack, etc. http://bit.ly/2NjZ3zh
Add a comment...

Post has attachment
eSilicon’s #7nm #MachineLearning ASIC platform is available for customer designs. The neuASIC IP platform includes multiple compiled, hardened, verified functions such as configurable MAC blocks, convolution engine & 56G #SerDes. #MLhardware http://bit.ly/2RmtAjk
Photo
Add a comment...

Post has attachment
eSilicon’s #7nm #MachineLearning ASIC platform is available for customer designs. The neuASIC IP platform includes multiple compiled, hardened, verified functions such as configurable MAC blocks, convolution engine & 56G #SerDes. #MLhardware http://bit.ly/2Rl32i3
Photo
Add a comment...

Post has attachment
Designing with #HighBandwidthMemory (#HBM2/2.5D) for #HPC + a sneak peek at #HBM2e with eSilicon’s Tim Horel. Tech Talk Video from SemiEngineering. #Hyperscale #DataCenter #CloudComputing #MachineLearning http://bit.ly/2RfVPzU
Photo
Add a comment...

Post has attachment
#AIHardwareSummit video: eSilicon’s #AI VP, Patrick Soheili, presents a flexible #MachineLearning ASIC platform. ASICs deliver orders of magnitude performance improvement & power efficiency vs. #CPUs, #GPUs & #FPGAs. #AIchip #AIhardware #MLhardware #HPC http://bit.ly/2Qro2T1
Photo
Add a comment...

Post has attachment
Energy-Efficient AI
Carlos Maciàn, senior director of innovation for eSilicon EMEA, talks about how to improve the efficiency of AI operations by focusing on the individual operations, including data transport, computation and memory. http://bit.ly/2NTAQRD #AIchips #7nm
Photo
Add a comment...
Wait while more posts are being loaded