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Agnisys Inc.
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Accelerating Design Verification
Accelerating Design Verification

75 followers
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#ISequenceSpec, a productivity enhancer tool from Agnisys lets #semiconductor designers generate a unified portable sequence of tests from the specification for verifying a #ChipDesign. So the designers can verify the chip design fast and efficiently and deliver quality products timely. http://bit.ly/2hv2mIf
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Improve #design productivity by making it easier to verify the design components with #IDesignSpec Enterprise Edition. Register now to get an exclusive time slot with our experts.https://www.agnisys.com/events/dac-2017-austin-tx-june-18-22/
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Looking for the #DesignVerification #Engineer who knows the fundamentals of computer #architecture and have practical experience of working on #microprocessor designs. https://www.linkedin.com/jobs/view/351558071/
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Different flows for #UVMRegister Generation ::The UVM register model is an essential component of the #UVM based verification for modern designs. In this article we discuss the various paths to create #UVMRegisterModel. We at Agnisys help teams automatically generate the register model and over the years many teams have started using our tools.https://www.agnisys.com/different-flows-for-uvm-register-generation/
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#ARV, a fine #EDA tool from #Agnisys enables #semiconductor designers to perform right and comprehensive verification of #SOCRegisters at the first time. The tool helps to improve the designers’ efficiency and facilitates faster completion of #SoC development projects. http://bit.ly/2lHnbSA
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#IDesignSpec, a high performance tool based on #UVMRegister model enables #Chip designers to verify #SoC chip designs in a fast manner. So the chip development firms can complete their projects on time. http://bit.ly/2l6jJO0
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Technologically advanced #ASICDesign software from #Agnisys lets #chip designers perform their #chip design and verification tasks in a fast and efficient manner. So the designers can build and deliver exceptional quality and bug free #ASIC #ChipDesigns on time. http://bit.ly/2l3yYXI
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By using innovative #EDATools based on advanced #semiconductor verification methodologies like #SystemVerilog and #UVM, semiconductor designers can perform their #ChipDesign and verification tasks in a fast manner. So the designers can deliver high quality and bug free products on time. http://bit.ly/2gFRVlU
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Enables users to describe the programming and test sequences of a device and automatically generate sequences ready to use from an early design and verification stage to post-silicon validation with #SpecificationAutomation. http://bit.ly/2hv2mIf
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To enable #SOCDesign teams to perform fast verification of #ChipDesigns, #Agnisys offers #technologically superior #SOCVerificationTools. These enable users to create error free and accurate #chip designs fast and with less effort. http://bit.ly/2hv2mIf
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