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Aman Jangra
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How to find a critical path delay in Xilinx?

Critical path delay:-  The  total delay of the longest path cover through input to output of designing is called critical path delay.

Now we will know , how to find critical path delay in Xilinx?

First of all we click tools then timming analyzer and then clic post map .

Gate delay:- The delay in total no. of gate which we have use in designing.We have find  gate delay in Xilinx with synthesis report.

Net delay:- The net delay is defined as with switching of  inputs
We have find net delay  in Xilinx with synthesis report.

Static power:- The static power is defined as the multiplication of source voltage to dc  carrying current of  dc input signal in cmos. static power only calculated  the transistor performance.
We have find static power  in Xilinx .
First of all we click tools then click xpower analyzer .
And we find out static power in report.
 
 Dynamic  power:- The dynamic  power is defined as the multiplication of source voltage to ac carrying current of  ac input signal in cmos. Dynamic power will calculate only capacitive values because how many no. of charge capacitor will store.
We have find dynamic power  in Xilinx .
First of all we click tools then click xpower analyzer .
And we find out dynamic power in report.

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