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Van Loi Le
Attended Da nang University of Technology
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Van Loi Le

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Programmable digital delay timer (LS7212) in Verilog. The digital delay timer being implemented is CMOS IC LS7212 which is to generate programmable delays.
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Van Loi Le

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Basic digital logic components in Verilog HDL
Basic digital logic components in Verilog HDL such as full adder, D Flip Flop, ALU, register, memory, counter, multiplexers, decoders
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A low pass FIR filter for ECG Denoising in VHDL
      Let's start 2017 with a bang. In this project, a simple low pass FIR filter is implemented in VHDL for ECG Denoising. The VHDL code for the FIR filter is simulated and verified by comparing the simulated results in Modelsim with the correct results ge...
A simple low pass FIR filter for ECG Denoising in VHDL. Sample ECG inputs are provided in input.txt files, the VHDL filter code reads those ECG files, apply digital filtering, and write the results into output.txt files for v...
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What is an FPGA? Top five reasons why I love FPGA design
FPGA stands for Field Programmable Gate Array.   Let's analyze the term: Field-Programmable: An FPGA is manufactured to be easily reconfigured by developers, designers or customers. To program an FPGA as a specific configuration, Verilog HDL or VHDL (Hardwa...
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A complete 8-bit Microcontroller in VHDL
In this project, a complete 8-bit microcontroller is designed, implemented, and operational as a full design which users can program the microcontroller using assembly language.
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32-bit Unsigned Divider in Verilog
In this project, a 32-bit unsigned divider is implemented in Verilog using both structural and behavioral models.
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Van Loi Le

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Programmable digital delay timer (LS7212) in Verilog HDL
          Today's project is an implementation of a programmable digital delay timer in Verilog HDL.     The digital delay timer being implemented is CMOS IC LS7212 which is to generate programmable delays. The specification of the delay timer can be easily...
Programmable digital delay timer (LS7212) in Verilog. The digital delay timer being implemented is CMOS IC LS7212 which is to generate programmable delays.
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Basic digital logic components in Verilog HDL
    In this project, basic blocks in digital logic design such as D-Flip-Flop, adders, ALU, registers, memory, multiplexers, decoders, counters, etc.  are implemented in Verilog HDL for beginners. Verilog code for full adder: `timescale 1 ps / 100 fs
mod...
Basic digital logic components in Verilog HDL such as full adder, D Flip Flop, ALU, register, memory, counter, multiplexers, decoders
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Van Loi Le

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What is an FPGA? Top five reasons why I love FPGA design
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Van Loi Le

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A complete 8-bit Microcontroller in VHDL

In this project, a complete 8-bit microcontroller is designed, implemented, and operational as a full design which users can program the microcontroller using assembly language.
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Van Loi Le

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A complete 8-bit Microcontroller in VHDL
In this project, a complete 8-bit microcontroller is designed, implemented, and operational as a full design which users can program the microcontroller using assembly language.  The microcontroller has an 8-bit processor, a 128-byte program memory, a 96-by...
In this project, a complete 8-bit microcontroller is designed, implemented, and operational as a full design which users can program the microcontroller using assembly language.
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Van Loi Le

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32-bit Unsigned Divider in Verilog
In this project, a 32-bit unsigned divider is implemented in Verilog using both structural and behavioral models. The Verilog code for the divider is synthesizable and can be implemented on FPGA.  Structural Verilog code for 32-bit unsigned divider: `timesc...
In this project, a 32-bit unsigned divider is implemented in Verilog using both structural and behavioral models.
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  • Da nang University of Technology
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